p reliminary w26l04a 256k 16 high - speed cmos static ram publication release date: october 1999 - 1 - revision a1 general description the w26l04a is a high - speed, low - power cmos static ram organized as 262,144 16 bits that operates on a single 3.3 - volt power supply. the w26l04a has an active low chip select, separate upper and lower byte selects, and a fast output enable. no clock or refreshing is required. separate byte select controls ( lb and ub ) allow individual bytes to be written and read. lb controls i/o1 - i/o8, the lower byte. ub controls i/o9 - i/o16, the upper byte. this device is well suited for use in high - density, high - speed system applications. features high speed access time: 10/12 ns (max.) low power consumption: - active: 660 mw (max.) single + 3.3 v power supply fully static operation - no clock or refreshing industrial operating temperature grade available all inputs and outputs directly ttl compatible three - state outputs data byte control - lb (i/o1 - i/o8), ub (i/o9 - i/o16) available packages: 44 - pin 400 mil soj and 44 - pin tsop(ii) pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 a0 a1 a2 a3 a4 cs i/o1 i/o2 i/o3 i/o4 v dd v ss i/o5 i/o6 i/o7 i/o8 we a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 nc i/o9 i/o10 i/o11 i/o12 v dd v ss i/o13 i/o14 i/o15 i/o16 lb ub oe a15 a16 a17 44-pin block diagram a0 . . a17 i/o1 i/o16 v dd v ss . . data i/o decoder control ub cs oe we lb core array pin description symbol description a0 - a17 address inputs i/o1 - i/o16 data inputs/outputs cs chip select input we write enable input oe output enable input lb lower byte select i/o1 - i/o8 ub upper byte select i/o9 - i/o16 v dd power supply v ss ground nc no connection
p reliminary w26l04a - 2 - truth table cs oe we lb ub mode i/o1 - i/o8 i/o9 - i/o16 v dd current h x x x x not selected high z high z i sb , i sb1 l h h x x output disable high z high z i dd l l h l l 2 bytes read d out d out i dd l l h l h lower byte read d out hi gh z i dd l l h h l upper byte read high z d out i dd l x l l l 2 bytes write d in d in i dd l x l l h lower byte write d in high z i dd l x l h l upper byte write high z d in i dd l x x h h output disable high z high z i dd dc characteristics absolute maximum ratings parameter rating unit supply voltage to v ss potential - 0.5 to +4.6 v input/output to v ss potential - 0.5 to v dd +0.5 v allowable power dissipation 1.5 w storage temperature - 65 to +150 c operating temperature commercial 0 to +70 c industria l - 40 to +85 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device. operating characteristics (v dd = 3.3v 5%, v ss = 0v, t a = - 40 to 85 c for industrial grade, t a = 0 to 70 c for commercial grade) parameter sym. test conditions min. typ. max. unit input low voltage v il - - 0.5 - +0.8 v input high voltage v ih - +2.0 - v dd +0.3 v input leakage current i li v in = v ss to v dd - 10 - +10 m a output leakage current i lo v i /o = v ss to v dd output pins in high z, see truth table - 10 - +10 m a output low voltage v ol i ol = +8.0 ma - - 0.4 v output high voltage v oh i oh = - 4.0 ma 2.4 - - v
p reliminary w26l04a publication release date: october 1999 - 3 - revision a1 operating characteristics, continued parameter sym. test conditions min. typ. max. unit operating power i dd cs = v il (max.), 10 ns commercial - - 200 ma cycle = min. industrial 260 supply current i/o = open, duty = 100% 12 ns commercial - - 190 ma industrial 250 standby power i sb cs = v i h (min.), cycle = min. - - 30 ma supply current i sb1 cs = v dd - 0.2v, i/o = open all other pins = v dd - 0.2v/gnd - - 10 ma note: typical characteristics are evaluated at v dd = 3.3v, t a = 25 c. capacitance (v dd = 3.3v, t a = 25 c, f = 1 m hz) parameter sym. conditions max. unit input capacitance c in v in = 0v 6 pf input/output capacitance c i/o v out = 0v 8 pf note: these parameters are sampled but not 100% tested. ac characteristics ac test conditions parameter conditions input pulse leve ls 0v to 3v input rise and fall times 2 ns input and output timing reference level 1.5v output load c l = 30 pf, i oh /i ol = - 4 ma/8 ma ac test loads and waveform 5 pf r2 350 ohm r1 320 ohm 3.3v output 90% 90% 2 ns 10% 2 ns 10% 3.0v 0v including jig and scope ) ( for t t t olz, t t whz, t ow t clz, blz, chz, bhz, t ohz, rl = 50 ohm vl = 1.5v output 30 pf including jig and scope zo = 50 ohm
p reliminary w26l04a - 4 - ac characteristics, continued (v dd = 3.3v 5%, v ss = 0v, t a = - 40 to +85 c for industrial grade, t a = 0 to 70 c for commercial grade) read cycle parameter sym. w26l04a - 10 w26l04a - 12 unit min. max. min. max. read cycle time t rc 10 - 12 - ns address access time t aa - 10 - 12 ns chip select access time t acs - 10 - 12 n s output enable to output valid t oe - 5 - 6 ns ub , lb access time t ba - 5 - 6 ns output hold from address change t oh 3 - 3 - ns chip select to output in low z t clz* 3 - 3 - ns chip deselect to output in high z t chz* - 5 - 6 ns output enable to output in low z t olz* 0 - 0 - ns output disable to output in high z t ohz * - 5 - 6 ns ub , lb select to output in low z t blz * 0 - 0 - ns ub , lb deselect to output in high z t bhz* - 5 - 6 ns * these parameters are sampled but not 100% tested. write cycle parameter sym. w26l04a - 10 w26l04a - 12 unit min. max. min. max. write cycle time t wc 10 - 12 - ns chip select to end of write t cw 9 - 10 - ns add ress valid to end of write t aw 9 - 10 - ns address setup time t as 0 - 0 - ns ub , lb select to end of write t bw 9 - 10 - ns write pulse width t wp 9 - 10 - ns write recovery time cs , we t wr 0 - 0 - ns data valid to end of write t dw 6 - 7 - ns data hold from end of write t dh 0 - 0 - ns write to output in high z t whz* - 6 - 7 ns end of write to output active t ow* 3 - 3 - ns * these parameters are sampled but not 100% tested.
p reliminary w26l04a publication release date: october 1999 - 5 - revision a1 timin g waveforms read cycle 1 (address controlled, cs = oe = ub = lb = v il , we = v ih ) address t t t t d oh aa rc oh out read cycle 2 (chip select controlled, we = v ih ) address rc t t acs t cs chz t cl z d t blz out ub / lb t bhz t oe ohz t olz t ba t oe high-z high-z (1) note (1) : address valid prior to or coincident with cs transition low.
p reliminary w26l04a - 6 - timing waveforms, continued read cycle 3 (output enable controlled, cs = ub = lb = v il , we = v ih ) address t t t oe oh aa rc d out t olz t ohz write cycle 1 ( oe clock) address oe we d d t out in wc t wr t t aw t wp t as t dw t dh cs cw bw t ub/lb
p reliminary w26l04a publication release date: october 1999 - 7 - revision a1 timing waveforms, continued write cycle 2 ( oe = v il fixed) address we d d t t t t t t t (2) (3) t t wc aw wp ow whz (1, 4) dw dh oh as out in cs t t cw wr ub/lb t bw notes: 1. during this pe riod, i/o pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. the data output from d out are the same as the data written to d in during the write cycle. 3. d out provides the read data for the next addres s. 4. transition is measured 500 mv from steady state with c l = 5 pf. this parameter is guaranteed but not 100% tested.
p reliminary w26l04a - 8 - ordering information commercial: 0 c to +70 c part no. access time ( n s) operating current max. ( m a) standby current max. ( m a) pac kage w26l04aj - 10 10 200 10 44 - pin 400 mil soj w26l04aj - 12 12 190 10 44 - pin 400 mil soj w26l04ah - 10 10 200 10 44 - pin tsop(ii) w26l04ah - 12 12 190 10 44 - pin tsop(ii) industrial: - 40 c to +85 c part no. access time ( n s) operating current max. ( m a) st andby current max. ( m a) package w26l04aj - 10i 10 260 10 44 - pin 400 mil soj w26l04aj - 12i 12 250 10 44 - pin 400 mil soj w26l04ah - 10i 10 260 10 44 - pin tsop(ii) w26l04ah - 12i 12 250 10 44 - pin tsop(ii) notes: 1. winbond reserves the right to make changes to i ts products without prior notice. 2. purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure.
p reliminary w26l04a publication release date: october 1999 - 9 - revision a1 package dimension s 44 - pin small outline j band d seating plane s b b 1 1 44 e 1 a y a 2 a l 1 e 22 23 e e h c 0.330 0.178 0.013 0.007 symbol min. nom. max. max. nom. min. dimension in inches dimension in mm e 0.148 3.759 0.025 0.105 0.015 0.110 0.115 0.020 2.41 0.381 0.635 2.54 2.67 0.508 0.082 0.004 0 10 1.125 1.130 2.06 28.58 28.70 0.37 9.40 0 0.10 10.29 10.16 10.03 0.405 0.400 0.395 11.05 11.18 11.30 0.435 0.440 0.445 e h e l y s 1 a b c d a a 1 2 e b 1 0.044 0.050 0.056 1.12 1.27 1.42 0.045 1.14 10 3.585 3.251 0.138 0.128 0.026 0.028 0.032 0.66 0.711 0.813 1.120 28.45 q q 44 - pin standard type two tsop l l 1 c e d h d b e m 0.10 (0.004) a a 1 y a 2 q 1.20 0.05 1.05 1.00 0.95 0.25 0.12 18.31 10.06 11.56 0.40 0.35 0.45 0.15 0.17 18.41 18.51 10.16 10.26 11.76 11.96 0.50 0.60 0.80 0.10 0.047 0.041 0.039 0.037 0.010 0.014 0.018 0.005 0.006 0.007 0.721 0.725 0.729 0.396 0.400 0.404 0.455 0.463 0.471 0.80 0.031 0.016 0.020 0.024 0.031 0.004 0.002 dimension in inches min. nom. max. min. nom. max. symbol a a b 1 2 a c d e e l l y 1 h d dimension in mm q 0 5 0 5 o o o o
p reliminary w26l04a - 10 - version history version date page description a1 oct. 1999 - initial issued headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5796096 http://www.winbond.com.tw/ voice & fax-on-demand: 886-2-27197006 taipei office 11f, no. 115, sec. 3, min-sheng east rd., taipei, taiwan tel: 886-2-27190505 fax: 886-2-27197502 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii, 123 hoi bun rd., kwun tong, kowloon, hong kong tel: 852-27513100 fax: 852-27552064 winbond electronics north america corp. winbond memory lab. winbond microelectronics corp. winbond systems lab. 2727 n. first street, san jose, ca 95134, u.s.a. tel: 408-9436666 fax: 408-5441798 note: all data and specifications are subject to change without notice.
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